Wavecom GX64 Specifikace

Gx64 APPLICATION NOTE Power Management Reference: WI_DEV_Gx64_APN_007 Version: 001 Date: 2007/01/31

2.2.3 GR64002 This variant of GR64 implements all four PSC-options, ON/OFF, PON_H, ALARM and CHG_IN. Figure 4: GR64002 Power Management Block Diagr

3 Implementation Recommendations This section describes how to implement features related to the Power Management of the Wireless CPUs. 3.1 Applyin

3.2 Power state control of the Wireless CPU There are a maximum of six signals that affects the HW power state of the GR/GS64 family of Wireless CPU

The two SW power state control signals are not included in Figure 5. This figure only shows the HW-signals. Figure 6: Power Management State Diagr

The signal should be held low for at least tLow time for the Wireless CPU to be able to detect and respond with a power hold signal (PWR_KEEP). The

3.2.4 ALARM The ALARM-signal can be both an internal and external signal for all Wireless CPUs except GR64001 where it is only an internal signal.

3.2.5 AT+CFUN This AT-command is used to change the power state of the Wireless CPU. See the AT-command manual for more details. 3.2.6 AT*E2RESET

The numbers given above are approximations. The real current levels might differ, but should most often be less than what is listed. 3.4 Charging

Figure 7: Interface circuit implementation for GS64 The level translator type used in Figure 7 can be either ST2378E from ST Microelectronics, MAX3

Figure 8: Typical VREF level translation implementation in a GR64002 One drawback of this solution is that VREF cannot be used by the application t

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3.6.2 GR64002 HW-detection In GR64002, where VREF is an input to the Wireless CPU the HW-detection of the power state must use SIMDET instead of VRE

Table 4: Power state transition levels Wireless CPU Power status SIMDET level Power ON >1.5V Power OFF <0.4V It is possible to connect the

3.7 VRTC and ALARM These are the two system connector signals that relate to the RTC. VRTC is powered from VCC. If the application wants the RTC

The power supply should be an efficient converter that takes the VIN supply from whatever voltage level the source is providing and converts it to th

4 4.1 avecom Inc is not responsible for the charger power supplies reference design. The integrator sholisted below d 4.2 DC/DC Power Supply he imp

4.3 AC/DC Power Supply The implementation shown in Appendix B is the reference design of a 3.6V AC/DC tor from National Semiconductors. The input v

The circuit attains a periodic steady-state in which the volt-seconds across the are exactly balanced by the volt-seconds due to t voltage level tra

Gx64 APPLICATION NOTE Power Management Page: 27/30 4.3.3 Bill Of Material Ce document est la propriété exclusive de WAVECOM. Il ne peut être comm

Gx64 APPLICATION NOTE Power Management Page: 28/30 APPENDIX A This document is the sole and exclusive property of WAVECOM. Not to be distributed o

This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without prior written agreement. Ce document est la pro

Table of Contents 1 Introduction ... 5 1.1 ABBREVIATIONS .

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3.7 VRTC AND ALARM ... 22 3.7.1 USING ALARM AS P

1 Introduction This document describes how to apply power, control power states (On/Off), and give other hints on how to optimise the Wireless CPU i

1.2 Notation The following symbols and admonition notation are used to draw the reader’s attention to notable or crucially-important information.

2 Block Diagrams 2.1 System Power Management Block Diagram The GR/GS64 Wireless CPUs have a number of signals in the system connector that affect t

Table 1: Type / Variant Configuration GR64001 GR64002 GS64 Feature Type Pin(s) Pin(s) Pin(s) VCC PSI √ 1,3,5,7,9 √ 1,3,5,7,9 √ 2,4,6,8,10,

Figure 2: GS64 Power Management Block Diagram 2.2.2 GR64001 This variant of GR64 only implements two PSC-options, ON/OFF and CHG_IN. Figure 3: GR